Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- If you do it right, it will work well. Have you simulated your design in Modelsim? Are you sending a frame clock to frame your LVDS data? For example, if you are serializing 8:1, and then deserializing 1:8, you should be sending a frame clock that is 1/8th of the data rate. Have you ensured that your LVDS receivers have terminations? Cheers. Dave --- Quote End --- Is the frame clock you mentioned above the tx_syncclock in altlvds? i send it.And the LVDS have terminations.