Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- Our board have been made that the inclk ports are not drawn out. So i cann't use the internal pll of the lvds mega, and the internal pll of lvds mega needs a inlck to feed the pll. I will try the external pll . --- Quote End --- The altlvds component with PLL or with external PLL uses the same PLL component within the FPGA. If you have not routed a global clock input on your board, then you are in trouble. Cheers, Dave