Honored Contributor
Honored ContributorThanks a lot for all your responses. As you predicted, changing variables to signals didn't make any differece, even the RTL netlist stayed exactly the same.
As for the frequency of the board, that is one problem, I am not exactly sure. I am using an obscure Chinese board called SY_03091 with virtually no documentation. The clock to the CPLD is created using a HT46R47 microcontroller and a 4MHz crystal. I do have the source code of the firmware, but it looks like it was written by a elementary school student. They used delay loops to create the clock pulses and the code is full of magic numbers. The fact that the value of a pot (through an A/D) changes the clock frequency (by changing the number of loop iterations!) doesn't help either. Unfortunately I don't have an oscilloscope to check measure the pulses. Dividing the clock by 500 made the numbers on the seven segments change every 700ms. So I don't think the speed is a problem. I changed it to 10000 and that resulted in 14 seconds between the increments. I'll try to explain how it looks like in those 14 seconds: Let's assume the seven segment is showing the number '1'. For a couple of seconds, '1' is shown nice and clean. Then for two seconds, the other lamps of the seven segment flicker dimly and then they go off again, only to flicker a few seconds later. This continues until the number changes to '2' and the same process all over again. I tried the clock enable method that was suggested and the end result was exactly the same. To test further, I also defined another std_logic output called LED connected to a LED on the board, and added the following line at the very end:
SS <= SevSegVal;
LED <= '1'; -- Keep the LED always off
End RTL;
