--- Quote Start ---
oh ! i changed the name of this module in my project in this afternoon, and it's name is zh.v,and use it in the zhengxing.bdf ,so it's no problem aboat this project! and i also use the signaltap to see the state machine, it doesn't work.but when i press the reset ,the register of counter and data_out is
changed to '0',but when i don't press the reset ,the register of counter is changed from '0' to '3' all the time,and the state machine has no reaction.and the data_out is always high!
--- Quote End ---
Hi,
did you capture the data_in with signaltap ? Which clock did you use for signaltap ?
Kind regards
Gerd
Honored Contributor
