a question about verilog hdl?

Doubtfull. By difference, do you mean a difference in functionality, or a difference in area/speed(but same overall functionality). Synthesis does a good job of optimizing most structures, which gives you leeway to code in what makes the most sense. Of course, it does such a good job the final results often aren't what you'd expect, i.e. you may ask why/how it optimized something to such a degree, but once you spend a lot of time analyzing it, you realize the synthesis is correct.