Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHi Johannes,
You're right. The high pull-up is one of the problem. But I'm using a FPGA internal pull-up. I'm not quite sure how large it is. I may only estimate it based on the voltage level I could see. I don't know if it is able to be set. Anyway, from the point of view, to solve the problem, I may only use an external pull-up. Do you think so? Thank you! Peter Chang