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Honored Contributor
Honored Contributor8b10b clock recovery?
Would it be possible to use an Altera FPGA (Arria II GX or Cyclone IV GX) to snoop on a 2.5 Gbps PCI Express link (via the PIPE interface), recover the clock and send out the recovered clock to one o...
Altera_ForumHonored Contributor
Honored ContributorPCIe spec is a good point. In my understanding, it uses the reference clock as trigger in performance meaurements, as I already suggested.
