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Altera_Forum
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16 years ago

8b10b clock recovery?

Would it be possible to use an Altera FPGA (Arria II GX or Cyclone IV GX) to snoop on a 2.5 Gbps PCI Express link (via the PIPE interface), recover the clock and send out the recovered clock to one o...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Any changes in the impedance between the transmitter and receiver can certainly contribute to jitter. This includes all transmission lines and their interconnects. Also, the effect of the transmission line's loss is not necessarily considered jitter but it can look like jitter on the scope as the eye closes in from the left and right (rising and falling edges).

You might have a look at mindspeed:

http://www.mindspeed.com/web/product/category.html?id=2022&trail=2001

Have a look at their retimers and CDR products. Maybe one will work for you.

Also, what is the end destination of the PCI Express link? Tapping in the middle of that line to get a look at the signal is most certainly not going to look pleasant.

Jake