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Honored Contributor
Honored Contributor8b10b clock recovery?
Would it be possible to use an Altera FPGA (Arria II GX or Cyclone IV GX) to snoop on a 2.5 Gbps PCI Express link (via the PIPE interface), recover the clock and send out the recovered clock to one o...
Altera_ForumHonored Contributor
Honored ContributorWhat kind of data are you hoping to collect about the signal? The jitter is going to be quite high using the method you're describing.
Also you can only get the recovered parallel domain clock (125MHz or maybe 250MHz). But you don't need the serial clock to trigger a scope, the parallel clock is fine. Jitter is the biggest problem. If it were me, I'd look for an external reclocker or deserializer IC (with a passthrough) and get the clock that way. Jake
