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Altera_Forum's avatar
Altera_Forum
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17 years ago

8-bit progam memory problem

I have a Nios II, Quartus 8.1 project running on a board with 8-bit wide external SRAM.

If I load the program to on-chip memory it runs correctly and is able to do a memory test of the SRAM without problems.

If I try to load the program to external SRAM I get "verify failed".

I connected a logic analyzer to the SRAM pins and I discovered that the program downloader is only writing and reading back 50 bytes and the program is 200 bytes long. I suspect it thinks the memory is 32-bit wide.

What am I missing here?

I am using an Avalon tri-state bridge to interface with the memory.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    Problem solved.

    I had to edit the EXT_SRAM_hw.tcl file created by the component editor, using a text editor.

    Then change the line:

    set_interface_property MemoryInterface addressAlignment NATIVE

    to:

    set_interface_property MemoryInterface addressAlignment DYNAMIC

    or just delete the whole line.

    This causes the system to do four byte reads to the SRAM for every Avalon bus read.

    This line got put in automatically but there is no user interface control to change it.