5V input COMPATIBLE ALTERA FPGA FAMILY

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I am giving synchronous clk and data...clk rate is 153.610kHZ.....do you think a level converter will help this without any deterioration in performance

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A period of a Kilohertz waveform is an eternity to modern FPGAs, you can use buffers like the TinyLogic and LittleLogic devices from Fairchild and TI, or if the signals are bidirectional and you don't have a direction control, use a bus switch. Fairchild, TI, NXP, Pericom, and others have parts. Just search on Digikey, and then read some data sheets. If you have questions, post them on the forum.

Cheers,

Dave