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Altera_Forum's avatar
Altera_Forum
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16 years ago

30 ~ 40mins runtime NIOS PIO fails

Hi, I have a issue with the PIO's... I used the PIOS to gather sensor data from a fifo buffer.. this runs very well pooling 24 sensor data from a buffer at 3msec X 24sensors... The problem is a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi,

this is the diagram for our FPGA 2... the inputs came from the optos at high speed.. all nios pios are use internally. and external pins are reference to 3.3V supply... The problem is the 1x9bit PIO input.. I confirmed that the specific sensor in question is present to the NIOS II block by probing this 1x9bit PIO input when the 200msec latency occurs... the mbus is not enabled and no other task excpt servicing this 1x9bit PIO input... 1x9bit PIO input is not interrupt enable... This is being pooled after the SM Read Req block have received a 1bit signal from the NIOS 2 block...the SM Read Req block will then trigger on clock to read the fifo thru rdReq line..

rgds

lanz