Forum Discussion
Altera_Forum
Honored Contributor
16 years agoNo thoughts anyone?
Three boundary scan cells behave in a drive-strength limited fashion, or incorrect output voltage level fashion. If you were sure the BSDL file was correct, that the FPGA is definitely not configured at the time of test, and the board layout and physical build is proven, what else would you look at? I have Altera support looking into it, as well as Corelis (developer of boundary scan test software and hardware).