[2 Questions] How to use keyboard as input means for Cyclone II DE1 Board? and more

You need to do more research. You can find a description of I/O constraints in the Quartus documentation. Go to the Altera website and click the Documentation link. Then click Quartus Prime Software under the Software and IP heading. The I/O constraints are covered in chapters 1 and 2 of volume 2 in the quartus handbook. There is also an introduction that has a good overview of the development process.

I prefer to use the pin planner, but sdc files are also popular. Most dev boards come with project examples that have already specified the I/O constraints. It's probably best to use one of these as a starting point. It is possible to damage the FPGA if voltage I/O constraints aren't correct. Also, some settings needed for high speed make the FPGA more subject to ESD. It's a good policy to always reuse constraints from a working project.