Forum Discussion
Altera_Forum
Honored Contributor
12 years agoDon't forget the writer side of the Frame Buffer also requires SDRAM bandwidth. With the Test Pattern Generator at 150MHz, I think you are distorting your results because the writer side will attempt to consume all of the available bandwidth. Add a second slower clock for the Test Pattern Generator to run from (15MHz? 1MHz? doesn't matter, you just need one frame to make it to the buffer).
In the 150MHz domain in your SignalTap, throw in the Avalon-ST 'valid' and 'ready' signals, and the Avalon-MM 'waitrequest' and 'readdatavalid' signals. This will give you an idea of how efficiently you're moving data to/from SDRAM (you want to see long contiguous bursts of 'valid')