Altera_ForumHonored Contributor13 years ago100 pF filter capacitor on TMS programming pin Hello everybody, Alter reccommends the use of a 10k pullup resistor to VDD on the TMS JTAG pin to keep the input at VDD when in ioperational mode. We are also considering a 100pF capaci...Show More
Altera_ForumHonored Contributor13 years agoAll output pins are driven by the programmer push-pull, e.g. TMS.
Recent DiscussionsQuartus Prime Pro 25.1 fatal error during fitter: Windows "Efficiency mode" requiredInquiry regarding purchasing FPGA licensesCyclone 10 LP's Extended Industrial partsAgilex 7 F/I Series True Differential Input TerminationSolvedAgilex 7 F Series Transceiver Pins Allowed Voltages During Powerup/When UnpoweredSolved