Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi martenv, hi everybody!
I found your post while browsing the internet for my problem, which is identical to yours. I am wondering if you probably have found a solution meanwhile. On my board I am able to program the serial configuration flash via Quartus II programmer with a .jic file. The Cyclone V FPGAs come up correctly. For field update I have kind of processor on the board, which is able to reprogram the configuration flash. I have found out, that an .rpd file can be generated by Quartus II programmer, that should be the right file for programming an SPI flash with a processor. But after doing so the Cyclone V FPGAs don't come up correctly. They show a configuration error via nSTATUS pin. I have compared the .rpd and the .jic file, and besides some header information, the raw configuration data is shifted by a nibble! When I strip down the .jic file to the raw configuration data and flash the data with my processor, everything works fine. So is it a feature or a bug for cyclone V? Has anyone an idea? Why is there such an nibble shift? Best regards, Maddin