New Contributor
New ContributorThe devices in our schematics do share the data and clock.
We expect to start the programming by asserting nCONFIG, wait for nSTATUS.
Once we have the first device ready to program
We plan to use a standard SPI driver as part of the programming.
This will, when called, pull the nCE low, transfer the configuration and at the end, it will pull the nCE high.
According to the datasheet, the chip would stop working with this approach.
A colleague of mine has tested this, and she claims that it appears to be OK to puil nCE high after the programming is complete.
We think that what actually happens is that nCE disables the programming of the device.
We also think that once the part is configured, it will ignore data, clock and nCE.
You have to pull nCONFIG low again to make the part react on those pins.
If it is so, then using standard drivers will work. If the device stops working after nCE is pulled high,
this approach does not work.
Right now I am planning to bitbang the configuration.
To maintain speed, I am thinking of having a routine which writes 32-bit words.
The problem is that the configuration memory is not an even amount of 32-bit words.
10CL025 = 5748552 bits = 179642,25 32-bit words.
I'd like to pad the last word with zero and send 179643 words.
This means I am shifting in an additional 24 bits into the device.
So please check again:
