Forum Discussion
Hi Ulf,
Apologize for the delay in response . Please see my answer below:
- Can you confirm that device #2 in your diagram is reset when nCONFIG goes low even though the device is disabled (nCE is high)?
Yes, device #2 in our diagram reset when nCONFIG goes low. This is due to device #1 and #2 are parallel in the diagram, so both are reset if nCONFIG low.
- Can you confirm that device #2 in your diagram is not affected by any transitions on DATA0, DCLK while the device is disabled (nCE = high)?
Yes, device #2 in our diagram is not affected by any transition because the nCEO was connected to device #2 to send signals to nCE while device #1 is running. We program them one by one due to nCONFIG is parallel. Per my understanding, your design is not the same as ours, it is not parallel and does not depend to each other.
- Can You confirm that once the set number of configuration bytes have been sent on DATA0, DCLK any bytes following that are ignored.
Sorry, kindly clarify more on this statement.
- Can you confirm that once nCE goes low on device #, incoming data is accepted immediatel(no delay)?
Yes, incoming data is accepted immediately(no delay). There is only a requirement clock cycle. After device #1 is done configure, nCEO will send signal to nCE in device #2.
- What happens with the I/O pins if nCE goes high after configuration?
Device disable.
Thank you.
Regards,
Aiman