What is the effect of nCE on passive serial configuration

Thank You.

Unfortunately, that does not answer the question.

The application notes cover how you either design for a single device

or two devices connected together, forcing you to configure both devices.

We are using the FPGAs in a third way, where we can configure the FPGAs in an arbitrary order.

For this we need to know what happens inside the device when nCE is high, and the nCONFIG is pulsed low.

We suspect that we can do configuring the following way:

Start condition

nCE: high, MOSI: X CLK: low, nCONFIG: high

1. Pulse nCONFIG low and bring back high
2. Wait for nSTATUS high
3. Bring nCE low
4. Send configuration data LSB first and at least one more byte to ensure two more clocks
5. At this point CONF_DONE should go high
6. Bring nCE high (end of SPI transfer)
7. Test CONF_DONE which should be high or error
8. Wait until INIT_DONE is active before using the contents.

This is how the U-Boot and Linux kernel expects the S/W to be written.

The reason we think that this will work is that both our FPGA will see the surrounding signals the same way as the second FPGA in a chain of FPGAs.