What is it about CCI-P and why there is no Dev kit compatible FIM (FPGA Interface Manager)?
Maybe this question belongs to Application Acceleration with FPGAs.
I am learning about GPUs and currently trying to run this vortex project on a FPGA.
I came across a lot of new terminologies, libraries and tools in the process. So, my questions are pretty basic (or maybe not?) but I couldn't find much help on this and thus asking here.
Question 1:
Why CCI-P is specific to Intel Xeon processor? Isn't it just a protocol for communication between FIU/FIM and AFU. And FIU then communicates with the host channel and the local memory? So, in this case does it matter what host CPU I am using?
Question 2:
All intel documents on FIM (and even on CCI-P) are very specific to Intel Xeon with integrated FPGA and/or Intel PAC. I have this impression that maybe because FIM cannot be synthesized on development kits? And if yes, why?
It is very likely that my understanding on the above topics is totally incorrect and I am open for any correction in this regard. Please share your views or even any links/blogs that will help me to understand these topics better.
Thank you!