Two CV GT Dev Kits talking to each other as RP and EP?

Hi Wei Chuan,

thank you very much for your prompt reply.

"But you should carefully select appropriate host pc: pc with integrated pcie ..."

There will be no host PC.

The project is now working with a 5CSXC6N development board as a Root Port in whose PCIe slot one of the above mentioned CV GT Dev Kits is inserted. But the SOC part of the 5CSXC6N isn't used - only the advanced qsys from the example.
The app on the 5CSXC6N does the job of the OS and configures the Avalon-ST HIPs as root port (5CSX6N) and as Endpoint (5CGTD9). The communication between the two FPGAs works.

But in the future only 5CGTD9 FPGAs will be used. That's why I need to know whether the tasks that the 5CSXC6N now performs could in principle also be taken over by a second 5CGTD9.

A PCIe switch is planned for later, but it will take some time until a suitable board has been developed. In the meantime, I wanted to make an attempt with the above constellation (plug the two CV GT Dev Kits into a ready-to-buy PCIe bus board).

Will this (without host pc) still be "as simple as possible" or is there something else I have to consider?

Best regards