New Contributor
ContributorAs I understand your question, you have instantiated the TSE IP core, and is asking which IP block is needed to interface the TSE IP to transceiver & SFP.
Once instantiated the TSE IP in the design, you just need to set the TSE IP GUI's 'Transceiver type' to 'GXB', then assigned the xcvr Tx/RX channels to the respective FPGA pins in Quartus design. Respective GXB module is included for target devices with GX transceivers.
Snapshot below showing the GXB option, from Cyclone 10 Triple Speed Ethernet IP Core User Guide, Table 18
https://www.intel.com/content/www/us/en/docs/programmable/683402/21-3-19-5-0/about-this-ip.html
The link below consists of more TSE User Guides and example designs for your reference.
