New Contributor
New ContributorI disagree with you on this specific example. My module is here to cross clock domain, whatever the clock are synchronous or not.
If clock are asynchronous, by setting clock as asynchronous in my SDC it will of course disable any timing constraint between these 2 clock domains.
If clock are synchronous ... yes by constraining source clock and destination clock, all path will be constrained including the input of the synchronizer. But, it could be very difficult to meet the timing due to clock frequencies and phase relation ship. This is the reason why I want to add a set false path at the input of the synchronizer as it is recommended by everyone.
The reason why I want to put a max delay between the 2 FlipFlop is to deal with metastability that will occur on first flip flop since input can be totally asynchronous to destination clock (It can be pushbutton for example ...). By setting a maxdelay between the 2 FFs, it will "force" to place the 2 FFs relatively close one of each other : and this will reduce metastability probability.
One more time, my question is more global than this example. I try to find a solution to constrain any module which needs a specific constraint quite automatically like quartus does it when creating some ip core like LVDS_SERDES IP core on Cyclone10 Gx.
Here find attach the 2 files that quartus create which constrains any instantiation of this module in the design.
TCL file include some generic function that will find modules and targets elements
SDC file will call this tcl file apply specific constraint to some element in each module instantiation.
I try to modify these file for my project but I do not succeed ...
Note : I had to change file extension to import files in this forum because it doesn't allow TCL file and SDC files ....
Super ContributorYou say you've heard this recommendation of a false path on the input of the synchronizer from everyone. I've never seen or heard of this and I've been constraining designs for a long time. Reference? Or are you referring to something asynchronous or completely asynchronous like a button press on the input? This of course would be a false path.
Typically, for synchronous clocks, the clocks are both generated by the same PLL. That's why you wouldn't need to do this. The relationship on both sides of the synchronize is set by the PLL. You may need to use multicycle to describe the relationship between data coming in and out of the synchronizer, but you don't need a false path in this case.
For metastability, instead of using timing constraints, it's usually recommended to make the synchronizer chain longer with extra register(s). Quartus can recognize synchronizer chains, choose good placement for the registers in the chain, and maintain them through compilation. There's even a metastability report you can generate in the timing analyzer to see the MTBF for each synchronizer.
The rest of your query is scripting stuff, which I'm not an expert in, but of course there are lots of references available.
New ContributorAs I said in my first post, I develop modules that can be used in many projects where clock relationship can be different.
Sometimes they can be synchronous and sometines not. That's why I need to put a set false path to be more general.
Moreover, if clocks are effectively synchronous, indeed I don't need a set_false path ... but i don't need a synchronizer neither ... so I won't use this synchronizer module.... (If I know that clocks are synchronous by design)
Well, my question was not about the need or not of a timing constraint but how to find a specific register based on a module name. And if i had already found some scripts to do that I wouldn't ask the question here. So if you know where I can find these script I will be grateful.
best regards
Super ContributorHi @rhe
I am not sure if there is a particular script that can help you in regards to this case.
However, you may checkout the Intel Quartus Prime Pro Edition User Guide: Scripting for a comprehensive reference of all the Intel Quartus Prime Tcl packages and commands.
You could also type quartus_sh --qhelp in the command prompt (make sure the dir at <quartus installation directory>/quartus/bin64) to starts the Intel Quartus Prime Command-Line and Tcl API Help browser, a viewer for information about the Intel Quartus Prime Command-Line executables and Tcl API.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
