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jkhoo's avatar
jkhoo
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Stratix V IO pins in bank C & D cannot ramp to 3.3V when VCCIO is source with 3.3V

Why is there difference in voltage level in bank 3C/3D IO pins when setting the current strength between 8mA, 12mA versus 16mA? I am expecting 3.3V on the IO pins but only get 1.5V when setting the c...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

I would suggest you to not trying something out of spec as it is not guaranteed for the performance and might damaging the device.


I can suggest you use lever shifter to convert signal to 3.3v as this is safer implementation. Lever shifter is an external component to convert signal voltage level.