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jkhoo's avatar
jkhoo
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Stratix V IO pins in bank C & D cannot ramp to 3.3V when VCCIO is source with 3.3V

Why is there difference in voltage level in bank 3C/3D IO pins when setting the current strength between 8mA, 12mA versus 16mA? I am expecting 3.3V on the IO pins but only get 1.5V when setting the c...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

I would suggest you check the board if there is possible leakage short to the ground on those pins.

The 16mA current setting may override the leakage current that is why you can get 3.3v on the pins compared to 8mA and 12mA.