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seanchen1996's avatar
seanchen1996
Icon for New Contributor rankNew Contributor
3 years ago

Stratix 10 GX L-Tile Dev Kit Resource compiling Issues

Hi , I'm having trouble compiling the resource files of Intel® Stratix® 10 FPGA's . The following URL: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

This might be related to this KDB:

https://www.intel.com/content/www/us/en/support/programmable/articles/000074366.html


You may check out the reason why Error (329006): Some pins have illegal board trace models happens and action to take.

https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#msgs/msgs/esin_pins_with_invalid_board_trace_model.htm


Let me know if it helps.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.