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Wangjun8's avatar
Wangjun8
Icon for New Contributor rankNew Contributor
1 year ago

Schematic design about I_PIN_PERST_N_15A_GXR and I_PIN_PERST_N_15C_GXR

当R-Tile 15A&15C当作MCIO的RC接口时（PCIE x4，RC，访问NVMe SSD），对应的I_PIN_PERST_N_15A_GXR和I_PIN_PERST_N_15C_GXR如何处理？能接CPLD输出的复位信号吗？

2 Replies

  • Farabi_Altera's avatar
    Farabi_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    English: When R-Tile 15A&15C is used as MCIO RC interface (PCIE x4, RC, accessing NVMe SSD), how to deal with the corresponding I_PIN_PERST_N_15A_GXR and I_PIN_PERST_N_15C_GXR? Can I connect the reset signal output by CPLD?


  • Farabi_Altera's avatar
    Farabi_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    Hello,


    If any of the channel is not in used, you need to connect these pins to GND.


    regards,

    Farabi