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Hans_1st's avatar
Hans_1st
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4 years ago

S10 UART1 Control

Hello, I am using Stratix 10 SX Development Kit and I want to control UART1 output something by using HPS. How many and what kind of registers should I configure like l4_sp register for Cyclone V ...
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Hans_1st,


Any follow up from the previous comments?


Thanks.

Regards,

Aik Eu


Hans_1st's avatar
Hans_1st
Icon for New Contributor rankNew Contributor
4 years ago

Hello aikeu,

I am sorry I forget to renew my comment. I try to add those two items in my socfpga_stratix10_defconfig but it still does not work.

However, I have something new which I open another community https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/How-to-Read-Write-L4-Peripheral-Slave-Bus-on-S10-SX-Device/td-p/1364632.

This new community shows more information about my problem. Could you please check this new community and if you have any suggestions please let me know.

Best Regards,

Hans_1st