receiver error for multi-simplex receivers application (transceiver arria 10)

Hi Zying,

I am sorry that we could not do the reverse loopback test because that we do not have theis daugther baord to do this thing currently.

For the previous configuration of IP, do you think there's any problem which I should note? (Now we only require our boards to support up to 5Gbps).

For simplex RX, we use manual mode to do lock-to-ref and lock-to-data.

cal_busy _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ //_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

ana reset ------------------------------------------------------|_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ //

locktoref ----------------------------------------------------------------------------------------------//--------|_ _ _ _ _ _ _ _ _ _ _ _ _

|<----------- long time ------------------------>|

tx_data_output _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ //--------------

locktodata _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _|-------------------------

dig reset -----------------------------------------------------------------------------------------------------------------------|_ _ _ _ _ _ _

For this reset solution, is there any issue?

And, about the board design for the voltage of VCCTR_GXB/VCCH_GXB/VCCPLL_GXB as the attached, do you think this is okay for so many channels work at the same time? (VCCTR_GXB decoupling to 2.6A, now work current is 2.5A, is there problem?)

BRs,

Lambert