You say you've heard this recommendation of a false path on the input of the synchronizer from everyone. I've never seen or heard of this and I've been constraining designs for a long time. Reference? Or are you referring to something asynchronous or completely asynchronous like a button press on the input? This of course would be a false path.
Typically, for synchronous clocks, the clocks are both generated by the same PLL. That's why you wouldn't need to do this. The relationship on both sides of the synchronize is set by the PLL. You may need to use multicycle to describe the relationship between data coming in and out of the synchronizer, but you don't need a false path in this case.
For metastability, instead of using timing constraints, it's usually recommended to make the synchronizer chain longer with extra register(s). Quartus can recognize synchronizer chains, choose good placement for the registers in the chain, and maintain them through compilation. There's even a metastability report you can generate in the timing analyzer to see the MTBF for each synchronizer.
The rest of your query is scripting stuff, which I'm not an expert in, but of course there are lots of references available.