Intel® Core™ i3-12100, MSI delay

Wincent_intel

We use an Xilinx FPGA. We do now indept timings measurements by FPGA scope. The MSI interrupt is send by Xilinx software. I want to check tomorrow about the Xilinx type. We found out that we lost 10us before the standard software block PCIe wrapper from Xilinx send the MSI interrupt. But still we see lot of delay variation between 5-15us before the interrupt handler is started. We have no detail what are the timings cost to start an interrupt function in the intel core. We have disable Hyperthreading and disable all power optimizations from the CPU. Also there is no extra graphic card in the system and only traffic to the LAN port is ongoing. Is there any timing information about interrupthandling inside a CPU?

Is this for everyone visible? Otherwise I can send more details about the issue.

Theon