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snehal_p's avatar
snehal_p
Icon for Contributor rankContributor
1 year ago
Solved

Building uboot for cyclone V SoC

Hello, We want to build boot image for customized cyclone V SoC board. We are following the below document, using Quartus Prime 22.1 Standard Edition on Ubuntu 20.04 system, https://www.rocketb...
Fpga Devkit
  • tehjingy_Altera's avatar
    tehjingy_Altera
    1 year ago

    Hi Snehal


    Just to update the forum case.

    The missing steps from the RBO page are the steps below:


    1.Step to convert the sof to rbf. You could use the command below to convert the sof.

    quartus_cpf -c -o bitstream_compression=on soc_system.sof soc_system.rbf


    2.Missing u-boot.scr could be gotten from the gsrd page.

    https://releases.rocketboards.org/2025.03/gsrd/c5_gsrd/u-boot.scr


    3.Place both rbf and the u-boot.scr in the sdcard partition 1 (sdfs)


    Regards

    Jingyang, Teh


tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi


The sopc2dts tool have been discontinued.

Currently, all device tree example are created and stored in the uboot branch and linux branch (arch/arm/dts/socfpga_cyclone5_socdk.dts).

It is advisable to make changes to the devkit device tree.


Are you using 2 different UART baudrate for the linux and uboot?

Can you share me both linux and ubiit device tree to me?


Regards

Jingyang, Teh


snehal_p's avatar
snehal_p
Icon for Contributor rankContributor
1 year ago
Hello,
1) Are you using 2 different UART baudrate for the linux and uboot?
-- during built can we select baudrate, PFA uboot and device tree
2) Following the steps https://www.rocketboards.org/foswiki/Documentation/HOWTOCreateADevicetreeForCycloneVSoC, we could generate a dts file for customized board but facing issue while generating a dtb file. Below is the error message
DTC arch/arm/boot/dts/my_cv_fpga_overlay.dtb
Error: arch/arm/boot/dts/my_cv_fpga_overlay.dts:50.10-11 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:351: arch/arm/boot/dts/my_cv_fpga_overlay.dtb] Error 1
make: *** [Makefile:1403: my_cv_fpga_overlay.dtb] Error 2
PFA header and dts file generated, as per our observation dts is not being updated wrt to header file generated..
Can you please share the pointers. 

Thanks and regards,

snehal_p