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minjoolee's avatar
minjoolee
Icon for New Contributor rankNew Contributor
4 years ago

PLL Reconfiguration using mif for strarix 10

Hi ) I want to generate PLL with mif setting for 5 clock speed. for example, input clock is 100MHz, I want to generate PLL which have 2 output clks. but it should be reconfigurable with mif...
Farabi_Altera's avatar
Farabi_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Min Joo,

Based on our conversation on phone, we do believed that this is simulation model issue for VCS. I am checking on modelsim if this can be done correctly. While checking this, I will file bug report to model owner so they can fix this.

regards,

Farabi