Forum Discussion
Zarquin
Occasional Contributor
Occasional ContributorPinning for Avalon-MM Reference Design on Cyclone V GTFD9 Dev Kit?
Dear Community,
Intro: I would like to configure the CVGT on my development kit as a PCIe endpoint. To do this, I have worked through this guide and synthesised the Avalon-MM reference design e...
ZarquinOccasional Contributor
Occasional ContributorDear sstrel,
I followed your suggestion, but my fitter just assigns random locations when I leave it blank (see attached picture, yellow marker).
How to prevent?!?
ZarquinOccasional Contributor
Occasional ContributorUseful link: Pin-Outs Files (PDF, TXT, XLS) for all Intel FPGAs:
https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html
