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srinivasan's avatar
srinivasan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Pcie loopback in the end point

Hello sir, I am using Arria 10 Pcie Hard IP in Arria 10 SOC development kit , Here I am configuring IP as Pcie root complex (Master FPGA) and need to acheive the loop back mode at the end ...
Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi


If you are using JESD204B serial loopback, there are two ways to enable.

1. there is a port in the IP interface, you can assert to enable the serial loopback mode.

2. You can use the reconfig interface as you describe in the case, actually there is no base address, but you should use the reconfig avmm interface, not the JESD204B csr avmm interface, the address for each channel is 0x2000, so the first channel base address is 0x0, and the second address is 0x2000, third 0x4000, and so on.


Hope this answer your question.

Regards,

Wincent_Intel