Forum Discussion
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- Hi Bob, I'm trying to create a PCIe endpoint on my Arria V starter board and trying to use the altpcie_demo_64.exe from the altera ref design to enumerate and do read/write to the fpga endpoint, but I'm getting all kinds of problems from the altpcie_demo not working...to the blue screen followed by my pc crashing. Can you assist since you've gotten the endpt working on your Arria V? Here's some of the things I'm doing: 1) following the Arria V Hard IP PCI express users guide (v.13.1 - Ch 3) I created the PCIe endpt and instantiated it making sure that I mapped to the correct fpga pins for the hard pcie IP. 2) Before, configuring the fpga I run the altpcie_demo_64 and the gui reports 78 devices. I also checked the device manager and only see the Jungo driver installed. 3) I program the fpga and then run the altpcie which reports 79 devices with one of the devices having the correct PCIe device and vendor ID - so this kinda tells me the PC has enumerated the fpga, right? However, the gui is greyed out so I can't do any read or write transactions to the fpga. Also, I noticed that the device manager has detected the Arria V dev kit - so that's good. However, sometimes I get the msg that the device doesn't have enough memory when I look at the devkit in the pc's device manager. Does this make any sense???? Sometimes it says the driver for the kit is working fine. Did you use the same Arria V starter board and did you use the altpcie_demo_64 too? I'd appreciate it a lot if you could share your wisdom in getting me past this hurdle of getting actual traffic going between the pc and the fpga. Thanks, Peter --- Quote End --- Peter, are you saying you developed the FPGA code yourself ... 1) following the Arria V Hard IP PCI express users guide (v.13.1 - Ch 3) I created the PCIe endpt and instantiated it making sure that I mapped to the correct fpga pins for the hard pcie IP. And didn't use the sample HW configuration ...? I can't see a Arria V design when I look at the altpci demo designs. I see a Arria II design. Let me try to down load the Arria II design ... If you did design up an example from the user guide ... how would you know where to map the SG DMA registers to work in concert with the device driver that comes with the example .. or am I missing something ? I will try to download the .zip exaample for Arria II and see what it contains. Best Regards, Bob.