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DNguy4
Occasional Contributor
Occasional ContributorPCIe design example for Arria10 SX
Hi, Any of you familiar with the PCIe design example for Arria10 to help me with the following? I generated two PCIe design example for Arria10 SX for two different boards (with different Arria10 S...
DNguy4Occasional Contributor
Occasional ContributorSK Lim,
Do you mean ltssmstate[4:0] signals? It's 0F during the test. See attached screen shot.
You can also see that st_rx_valid is high but there is no rx_st_sop or rx_st_eop. I mentioned this in the post.
