oneAPI for Ethernet and PCIe

Hi @colinz,

I hope you're doing well.

To address your question, the data transfer of FPGA applications written with OneAPI/DPC++ through PCIe can be done through Quartus Prime IP.

However, which IP core (PCIe or Ethernet) is to be used depends on the data movement method that you used.

Besides, it also depends on the OneAPI flow used. There are two flows:

1. FPGA Acceleration Flow (aka Full-Stack Flow)
2. SYCL HLS Flow (aka IP Authoring Flow)

In FPGA Acceleration Flow, everything is done automatically and according to the support of the Board Support Package. On the other hand, in the HLS Flow, the IP core connection needs to be done through Platform Designer/Quartus.

May I ask which of the flows you're planning to use? This would help me investigate further to provide a precise response to your inquiry.

Additionally, you may refer to these documentation on FPGA Opimization Guide for OneAPI to learn more:

1. FPGA Optimization Guide for Intel® oneAPI Toolkits
2. Intel® oneAPI Programming Guide

I hope these explanations sufficiently address your inquiry.

Thanks.

Best Regards,

VenTing_Intel

p/s: If any answers from the community or Intel support are helpful, please feel free to mark them as solutions, give them kudos, and rate the survey 4/5.