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Altera_Forum
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14 years ago

Nios II System Architect Design Tutorial problem

I've downloaded the new Quartus version 11.0, and I've tryed to learn the new Qsys software.

I've downloaded the Nios II System Architect Design Tutorial and related files (.zip) from http://www.altera.com/literature/lit-tutorials.jsp?gsa_pos=4&wt.oss_r=1&wt.oss=nios%20tutorial updated in June 2011.

I followed the instructions from the tutorial but at the end, trying to run the software: Run As > Nios II Hardware (pp. 5-9) I get in the console output:

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Nios II Embedded Evaluation Kit

Picture Viewer Demo

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Initializing IO devices...

Intitializing LCD control registers & gamma curve...[alt_tpo_lcd_init] Warning: Read incorrect chip ID.

--> Expected 0xc0, read 0xf0

--> The gamma curve or other LCD register writes may not succeed

Of course the LCD did not work.

Any idea about wath's wrong?

Thank you!

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    When learning Qsys I recommend going through the Qsys tutorial first.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    hi.

    i have been working a lot of time trying to get work my LTM on my altera de2 board. i have following the tutorial "Implementing an LCD Controller", "Nios II 3C120 Microprocessor with LCD Controller Data Sheet" and "Nios II System Architect Design"...i think that the problem resides on the instance...i do it in a block diagram :(
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Yes I can see instantiating the system using schematic entry being painful...... There are improvements happening to make this far less painful so it will get better (much better actually). That said, I used to be a big time schematic entry designer and after learning verilog I'm never going back so maybe you'll benefit from doing the same. I know new things (boooo!) but HDL can be a big time saver so any time to learn new productivity techniques is a good thing if you ask me.

    For the record I went from VHDL --> Schematic Entry --> Verilog so it wasn't like I only knew schematic entry when transiting to verliog HDL. That said anything I design these days I still write it down on a white board/napkins just like I did in my schematic days because having schematic entry knowledge I think is still important since it makes you think more about what you will end up with out of synthesis. Unfortunately a lot of people don't dabble in schematic entry anymore so it's becoming a lost art..... I still trust schematic folks to design something right the first time :)
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    hi!!! thank a lot for you help.

    i just made the instantiating with verilog and i get this message on the nios ii.

    Initializing LCD display controller

    - LCD Initialization OK

    [alt_tpo_lcd_init] Warning: Read incorrect chip ID.

    --> Expected 0xc0, read 0x0

    --> The gamma curve or other LCD register writes may not succeed.

    LCD spi write OK

    which can be the reason of this warning?? the lcd touch screen does not display anything

    thanks! :D
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    That warning just means that the gamma correction numbers couldn't be fetched from the EEPROM. Without proper gamma correction the colours might be off a little bit but you should still see something on the screen assuming the rest of the design is working properly.

    Make sure your frame buffers are populated in the correct memory. This should be achieved by making sure the heap is located in the correct memory or the memory is named appropriately. I'm not sure which is correct since I'm not really familiar with that design but I know the driver is looking to either allocate frames on the heap, or uses a hardcoded frame buffer memory name. If the heap is use (most likely) then you need to make sure whatever memory is used for the heap also has the SGDMA hooked up to it otherwise the video pipeline will not be able to fetch the image data out of memory.