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Joda's avatar
Joda
Icon for New Contributor rankNew Contributor
3 years ago
Solved

missing altera_safeclib in BSP Software Package from BSP Editor

Hi fellows, I am creating a FPGA project for the Cyclone 10 LP evaluation board. The project is setup like shown below. I would like to write to the external flash with the NIOS2 softcore. ...
  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    3 years ago

    Here is the settings for the GSFI IP.

    Hope it helps.

    Thank you.

    Regards,

    Kelly Jialin, GOH

KellyJialin_Goh's avatar
KellyJialin_Goh
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


Regards,

Kelly Jialin, GOH