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Joda's avatar
Joda
Icon for New Contributor rankNew Contributor
3 years ago
Solved

missing altera_safeclib in BSP Software Package from BSP Editor

Hi fellows, I am creating a FPGA project for the Cyclone 10 LP evaluation board. The project is setup like shown below. I would like to write to the external flash with the NIOS2 softcore. ...
  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    3 years ago

    Here is the settings for the GSFI IP.

    Hope it helps.

    Thank you.

    Regards,

    Kelly Jialin, GOH

KellyJialin_Goh's avatar
KellyJialin_Goh
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,

The GSFI IP needs to be enabled with the following settings (refer to picture below. Next, regenerate the .sopcinfo file and you should be able to see the altera_safeclib.


If you are still unable to see the altera.safeclib, it might be due to the software is not updated to the latest version.


We do have a design example but it is targeted on the Cyclone V board instead for your reference : https://www.intel.com/content/www/us/en/design-example/714709/cyclone-v-generic-serial-flash-interface-and-nios-ii-booting.html?


Thank you.


Regards,

Kelly Jialin, GOH