MAX5 CFM access?

Question

In the past I managed to reprogram a Cyclone V / the connected EPCQ flash from within the running firmware (new image was received via SPI and then stored in the EPCQ flash using a megafunction to access the FPGA flash pins). The new image was used after a reboot / power cycle.

I was hoping to be able to do something similar in the Max V, but it seems I can only access the UFM, not the CFM? Is there any way to access the CFM other than via (external) JTAG?

Thanks in advance for any help.

wz2 · Answer

Hi there,In MAX series device, you cannot control CFM like EPCQ in other device, because CFM is an internal Flash. According to your description, I think the function of real-time ISP can help u. Please refer such link and we can discuss the details.https://www.intel.com/content/www/us/en/docs/programmable/683786/current/real-time-isp.htmlBest regards,WZ

wz2 · Answer

Hi there,

I wanted to check if you have any further questions or concerns. If not, I will go ahead and mark this issue as resolved.

Additionally, we would greatly appreciate it if you could take a moment to fill out our survey. Your feedback is valuable to us and helps us improve our support quality.

Thank you for your time and cooperation.

Best regards,

WZ

flembcke · Answer

Thanks for the very quick reply.given your information, I'll need to control the JTAG pins (from an external source, we got a microcontroller which could receive the image via ethernet and then send it via JTAG) to remotely program the MAX5 (we are looking for a solution to apply an update for devices once they are shipped / where we cannot connect a JTAG probe / byte blaster anymore).I believe this got easier in MAX10 devices, correct?Kind regards,Felix

wz2 · Answer

Hi there,That is correct, because in MAX10, it can use the On-Chip Flash Intel® FPGA IP Core and do Remote system upgrade. Here is two link of example design for MAX10's RSU, one is for uart, the other is for I2C.UART:https://www.intel.com/content/www/us/en/design-example/714833/intel-max-10-fpga-intel-max-10-fpga-remote-system-upgrade-rsu-over-uart-for-the-nios-ii-processor-design-example.htmlI2C : https://www.intel.com/content/www/us/en/design-example/714746/intel-max-10-fpga-i2c-remote-system-update-design-example.htmlBest regards,WZ

flembcke · Answer

Since changing to MAX10 would need a complete redesign of our PCB I'll try to focus on a solution using the existing MAX5 design.I found some valuable information about JTAG here:1.7.2. Steps to Port the Jam STAPL Byte-Code Player (intel.com)So from what I can grasp, the steps would be:Convert MAX5 .pof file to .jbc Transfer .jbc file to our microcontroller which has a direct connection (via GPIO) to the MAX5 JTAG pinsUse the Jam STAPL Byte-Code Player (C code / library) to program the MAX5Are there any additional steps I missed?Kind regards,Felix

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MAX5 CFM access?

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