Is it possible to use DDR3 without configuring it from the QSYS hardprocessor? I want to use DDR3 for the boot up of the HPS. What should be the steps i need to follow. Thanks.

Hi,

As per my previous experience,

Although you are not using any logic in the FPGA, you have to use Quartus tool & Qsys. In the QSYS, configure the HPS with required IO muxing & boot source & HPS DDR3 configurations. Then just write a verilog/vhdl top module instantiatin the QSYS system.

Then compile the Quartus project & use the sopcinfo & FPGA binary for generating the HPS binaries like preloader, uboot etc. To generate HPS binaries, I think SOC EDS tool is used.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-a10-soc-boot.pdf - this document talks about HPS boot flow

With Regards,

HPB