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Aidin-P2D's avatar
Aidin-P2D
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Interfacing Nios II and HMC on Cyclone vGT

Hi everyone, Hope all well and I appreciate if you take a look at this and see if you can help us. We are using Cyclone V GT Dev board to test DDR3 HMC controller. We used 32 bit SGDMA to write int...
Aidin-P2D's avatar
Aidin-P2D
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi Kelly,

Thanks for information. Last week when I tried compiling the system and it wasn't working, I used Q13.1 will previous version of NIOS and it was giving me a warning that Nios instruction master can only support up to 28 bit which is exactly what you are confirming. However, now we are using Nios Gen2 and from data sheet , it must support 32 bit instruction set? am I missing a point? please see attached from Nios II Processor reference guide version 2020.10.22

based on this statement it should support 32 bit instruction set. we connected the same memory bank using soft-core and Nios II was working fine . only HMC is giving us this issue.

Regards,

Aidin.