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areebTAG's avatar
areebTAG
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3 years ago

Intel Quartus Prime 21.1 error about peak virtual memory 4745 megabytes(DE1-SoC)

Hi, I am trying to implement a HPS-FPGA design using DE1-SoC. However when I try to add my VHDL code to platform design, after "analyse synthesis files" I get an error about peak virtual memory. I...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
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3 years ago

Hi,


Could you provide me your whole design that you see this error?


areebTAG's avatar
areebTAG
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3 years ago

Hi,

This error is fixed by changing the sensitivity of the process(all) to including signals. The sensitivity list in VHDL only supports "all" in VHDL 2008 which is not available in Quartus Prime Lite.

Please close this question, the problem is fixed.