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Peter942's avatar
Peter942
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2 years ago

Intel® Core™ i3-12100, MSI delay

Dear People For a medical system we use an Intel® Core™ i3-12100 system with a specific FPGA card on PCIe slot1 (close to CPU). The card has a reference clocks and generate MSI interrupts. We see o...
Wincent_Altera's avatar
Wincent_Altera
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2 years ago

Hi Peter,


Can I know what is the FPGA device that you currently using ?


Regards,

Wincent_Intel


  • Peter942's avatar
    Peter942
    Icon for New Contributor rankNew Contributor
    2 years ago

    Wincent_intel

    We use an Xilinx FPGA. We do now indept timings measurements by FPGA scope. The MSI interrupt is send by Xilinx software. I want to check tomorrow about the Xilinx type. We found out that we lost 10us before the standard software block PCIe wrapper from Xilinx send the MSI interrupt. But still we see lot of delay variation between 5-15us before the interrupt handler is started. We have no detail what are the timings cost to start an interrupt function in the intel core. We have disable Hyperthreading and disable all power optimizations from the CPU. Also there is no extra graphic card in the system and only traffic to the LAN port is ongoing. Is there any timing information about interrupthandling inside a CPU?

    Is this for everyone visible? Otherwise I can send more details about the issue.

    Theon