New ContributorI have a cyclone 5 gx starter kit where i am trying to create a hardware that counts number of pulses generated by a source? according to logic count should increase every negative edge by one but actually it increases by 7 or 8.
pulses are generated by a speed encoder that gives one pulse per revolution.
input is taken by GPIO header pin 2 i.e. pin D26 on my FPGA Board
device : 5CGXFC5C6F27C7
cyclone 5 family
code used: i have quoted the part that is counting in bold and italic
module speedcal (
sig,//pulses from encoder
clk,//ref clock 50MHz
out,//speed output
value//counter for verification
);
//////////IO DECLARATION
input sig;
input clk;
output [15:0] out;
output [15:0] value;
/////////INT/EXT REG/WIRE DECLARATION
wire sig;
wire clk;
wire [15:0] out;
reg [27:0] count;
reg [15:0] value;
reg [15:0] temp;
reg [15:0] track;
reg [15:0] store;
reg check;
/////////MAIN
initial begin
count = 28'hfffffff;
check = 1'b0;
end
//50,00,000 count is 4C4B40
always @ ( posedge clk )
begin:COUNT_TIME
count = count + 28'h0000001;
if( count == 28'h04c4b40 ) begin
count = 28'h0000000;
check = ~check;
track = value;
end
end
always @ ( negedge sig )
begin:DIFFERENCE
value = value + 15'h0001;
end
always @ ( posedge check )
begin:RPMCAL
if( value > temp ) begin
store = value - temp;
temp = value;
end else begin
temp = value;
end
if( track == value ) begin
store = 16'h0000;
end
end
assign out = store * 12'h12c;
endmodule
