Forum Discussion
Jacob999
New Contributor
4 years agoHPS access the Avalon Memory-Mapped whether in pending status
I use Avalon Memory-Mapped (Avalon-MM) interfaces to implement read and write interfaces for master and slave components. HPS side is master and FPGA side is slave.
I find that HPS software code c...
tehjingy_Altera
Regular Contributor
4 years agoHi Jacob
Any update on this case?
Regards,
Jingyang, Teh
- tehjingy_Altera4 years ago
Regular Contributor
Hi Jacob
We did not receive any response from you to the previous reply that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Regards
Jingyang, Teh