Forum Discussion
Jacob999
New Contributor
4 years agoHPS access the Avalon Memory-Mapped whether in pending status
I use Avalon Memory-Mapped (Avalon-MM) interfaces to implement read and write interfaces for master and slave components. HPS side is master and FPGA side is slave.
I find that HPS software code c...
tehjingy_Altera
Regular Contributor
4 years agoHi Jacob
Are you referring to a flow control within the HPS?
For more information on the Flow Control between the Master and Slave you could refer to the document:
Regards
Jingyang,Teh